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John Kim, James Balfour, William Dally "Flattened Butterfly Topology for On-chip Networks" In the proceedings of the 40th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO), Chicago, IL. December 2007 [pdf]

John Kim, William Dally, Dennis Abts "Flattened Butterfly : A Cost-efficient Topology for High-Radix Networks"  In the proceedings of the 34th International Symposium on Computer Architecture (ISCA-34) San Diego, California, June 2007. [pdf]

John Kim, William Dally, Dennis Abts "Adaptive Routing in High-Radix Clos Network"  In the proceedings of the 2006 International Conference for High Performance Computing, Networking, Storage, and Analysis (SC'06), Tampa, Florida, November 2006. [pdf] (Best Student Paper Finalist)

Steve Scott, Dennis Abts, John Kim, William Dally "The BlackWidow High-Radix Clos Network"  In the proceedings of the 33rd International Symposium on Computer Architecture (ISCA-33) Boston, Massachusetts, June 2006. [pdf]

John Kim, William Dally, Brian Towles, Amit Gupta "Microarchitecture of a High-radix Router"  In the proceedings of the 32nd International Symposium on Computer Architecture (ISCA-32) Madison, Wisconsin, June 2005. [pdf]

John Kim, Abishek Das, "HCF: A Starvation-free Practical Algorithm for Maximizing Throughput in Input-Queued Switches", In the Proceedings of 2005 Workshop on High Performance Switching and Routing (HPSR), May 2005 [pdf]

John Kim, William J. Dally, Amit Gupta "Simulating High-Radix Interconnection Network" Concurrent VLSI Architecture Technical Report, Stanford, California, March 2005

John Kim, Chip Laub, "Synthesizing Register Files", Intel Design & Test Technology Conference (internal), 2H03, August 2003

John Kim, Earl Swartzlander, "Improving the Recursive Multiplier", In the Proceedings of  IEEE Asilomar Conf. on Signals, Systems, and Computers, October 2000 Pacific Grove, CA [pdf]

John Kim "Through-Wafer Etching", Master of Engineering Technical Report, Cornell University, May 1998

John Kim, William Dally "Hierarchical Organization of a High-Radix Router" S04-286. patent pending (Stanford University)

John Kim, Rich Collins "First-in, first-out memory system having both simultaneous and alternating data access and method thereof" Patent #6,779,055 Issued August, 2004 (Motorola)

"Flattened Butterfly Topology for On-chip Networks" 40th Annual IEEE/ACM International Symposium on Micro-architecture (MICRO-40), Chicago, IL. December 2007

"Flattened Butterfly : A Cost-Efficient Topology for High-Radix Networks" - 34th International Symposium on Computer Architecture (ISCA-34), June 2007

"Adaptive Routing in High-Radix Clos Network" - 2006 International Conference for High Performance Computing, Networking, Storage, and Analysis (SC'06), November, 2006

"Microarchitecture of a High-Radix Router" - 32nd International Symposium on Computer Architecture (ISCA-32), June 2005

"High-Radix Interconnection Networks" - Intel, Microprocessor Technology Labs March, 2007

"Cost-efficient High-Radix Topology" - University of Pittsburgh, CS Seminar October, 2006

"Interconnection Networks and High-Radix Routers"  - Samsung Electronics, Kiheung, Korea December, 2004