Programmable Stream Processors

Ujval J. Kapasi, Stanford University
Scott Rixner, Rice University
William J. Dally, Brucek Khailany, Jung Ho Ahn, Stanford University
Peter Mattson, Reservoir Labs
John D. Owens University of California, Davis

IEEE Computer, pages 54-62, August 2003


The demand for flexibility in media processing motivates the use of programmable processors. However, very large-scale integration constraints limit the performance of traditional programmable architectures. In modern VLSI technology, computation is relatively cheap—thousands of arithmetic logic units operating at multigigahertz rates can fit on a modestly sized 1 square centimeter die. Yet delivering instructions and data to those ALUs is prohibitively expensive.

The Imagine media processor validates the hypothesis that careful management of bandwidth and parallelism, from the programming language to the hardware, results in both high performance and high performance per unit of power



Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter Mattson, and John D. Owens. Programmable Stream Processors. IEEE Computer, pages 54-62, August 2003.

BibTeX Entry

  author =  {Ujval J. Kapasi and Scott Rixner and William J. Dally and
             Brucek Khailany and Jung Ho Ahn and Peter Mattson and John
             D. Owens},
  title =   {Programmable Stream Processors},
  journal = {IEEE Computer},
  pages =   {54--62}
  year =    {2003},
  month =    aug,

Ujval Kapasi