People of CVA

Group Leader

Professor William J. Dally

Support Staff

Uma Mulukutla
William Gates Building # 303
uma AT cs DOT stanford DOT edu
Tel: (650) 725-3726

Graduate Students

Name

Contact Info

Thesis Dissertation

Christine Avanessians

cavaness@cva

Programming System for Energy-efficient Embedded Computing


James Balfour

jbalfour@cva

Energy Efficient Embedded Processor Architectures


Daniel U. Becker

dub@cva

Interconnection Networks


James Chen

james119@stanford

Energy Efficient Circuits for on Chip Networks


Curt Harting

charting@cva

Energy Efficient Embedded Processor Architectures


Paul Hartke

phartke@cva

A Custom computing Engine to Accelerate Dynamic Programming with an Application to DNA Sequence Alignment


Ted Jiang

qtedq@cva

Interconnection Networks

George Michelogiannakis

mihelog@stanford

Interconnection Networks


Vishal Parikh

vparikh1@cva


Jiyoung Park

jypark@cva

Compilers and computer architecture


Jongsoo Park

jongsoo@cva

Compilers for Energy-efficient Embedded Computing


David Sheffield

dsheffie@cva

Energy Efficient Embedded Processor Architectures

Visiting Scholars

Keiji Matsumoto, kijim@cva, from Renesas Technology

Recent Alumni

Name

Location

Contact Information

Degree Year

Thesis

Manman Ren

Intel
mmren@cva.stanford.edu
2008
Compilers for streaming processors and machines
Uppsala University
davidbbs@cva.stanford.edu
2008
Abhishek Das
Cuil
abhishek@cva.stanford.edu
2008
Compilation methods to efficiently allocate resources in a streaming processor

John Kim

KAIST

jjk12@cva.stanford.edu

2008

High-Radix Interconnection Networks

Tim Knight

 

tjk@cva.stanford.edu

2007

Stream architecture, languages and compilers for stream architectures

Amit Gupta

Google

agupta@cva.stanford.edu

2007

Hybrid Topologies in Interconnection Networks

Jung-Ho Ahn

Seoul National University

gajh@cva.stanford.edu

2007

Memory and Control Organizations of Stream Processors

Prof. Mattan Erez

UT Austin

merez@cva.stanford.edu

2006

Merrimac Streaming Supercomputer

Prof. Patrick Chiang

Oregon State

pchiang@cva.stanford.edu

2006

Precision Clock Synthesis for Next Generation High Speed Serial Links

Nuwan Jayasena

Nvidia

jayasena@cva.stanford.edu

2005

Memory Hierarchy Design for Stream Computing

Andrew Chang

Cadence Design Systems

achang@cva.stanford.edu

2004

VLSI Datapath Custom Cell Optimization

Dr. Arjun Singh

Google

arjunsingh@gmail.com

2005

Load-Balanced Routing in Interconnection Networks

Professor Kelly Shaw

University of Richmond

kshaw@richmond.edu

2005

Resource Management in Single-Chip Multiprocessors

Dr. Sarah Harris

Harvey Mudd

sharris@odin.ac.hmc.edu

2005

Synergistic Caching in Single-Chip Multiprocessors

Dr. Brian Towles

D. E. Shaw

btowles@cva.stanford.edu

2005

Distributed Router Fabrics

Dr. Ujval Kapasi

Stream Processors

ujk@cva.stanford.edu

2004

Conditional Techniques for Stream Processing Kernels

Dr. Brucek Khailany

Stream Processors

khailany@cva.stanford.edu

2003

The VLSI Implementation and Evaluation of Area- and Energy-Efficient Streaming Media Processors

Former Members

Technical Staff

Visiting Scientists


Return to CVA Home Page

webmaster@cva.stanford.edu