People of CVA

Group Leader

Support Staff

Uma Mulukutla
William Gates Building # 303
uma AT cs DOT stanford DOT edu
Tel: (650) 725-3726

Graduate Students

Name	Contact Info	Thesis Dissertation
James Balfour	jbalfour@cva	Energy Efficient Embedded Processor Architectures
Daniel U. Becker	dub@cva	Interconnection Networks
Clinton Buie	chbuie@cva
James Chen	james119@stanford	Energy Efficient Circuits for on Chip Networks
Curt Harting	charting@cva	Energy Efficient Embedded Processor Architectures
Paul Hartke	phartke@cva	A Custom computing Engine to Accelerate Dynamic Programming with an Application to DNA Sequence Alignment
Ted Jiang	qtedq@cva	Interconnection Networks
George Michelogiannakis	mihelog@stanford	Interconnection Networks
Jiyoung Park	jypark@cva	Compilers and computer architecture
Jongsoo Park	jongsoo@stanford	Compilers and computer architecture
David Sheffield	dsheffie@cva	Energy Efficient Embedded Processor Architectures

Recent Alumni

Name	Location	Contact Information	Degree Year	Thesis
Manman Ren		mmren@cva.stanford.edu	2008	Compilers for streaming processors and machines
David Black-Schaffer	Uppsala University	davidbbs@cva.stanford.edu	2008	Block Parallel Programming for Real-Time Applications on Multi-core Processors
Abhishek Das	Cuil	abhishek@cva.stanford.edu	2008	Compilation methods to efficiently allocate resources in a streaming processor
John Kim		jjk12@cva.stanford.edu	2008	High-Radix Interconnection Networks
Tim Knight		tjk@cva.stanford.edu	2007	Stream architecture, languages and compilers for stream architectures
Amit Gupta	Google	agupta@cva.stanford.edu	2007	Hybrid Topologies in Interconnection Networks
Dr. Jung-Ho Ahn	H.P. Labs	gajh@cva.stanford.edu	2007	Memory and Control Organizations of Stream Processors
Prof. Mattan Erez	UT Austin	merez@cva.stanford.edu	2006	Merrimac Streaming Supercomputer
Prof. Patrick Chiang	Oregon State	pchiang@cva.stanford.edu	2006	Precision Clock Synthesis for Next Generation High Speed Serial Links
Nuwan Jayasena	Nvidia	jayasena@cva.stanford.edu	2005	Memory Hierarchy Design for Stream Computing
Andrew Chang	Cadence Design Systems	achang@cva.stanford.edu	2004	VLSI Datapath Custom Cell Optimization
Dr. Arjun Singh	Google	arjunsingh@gmail.com	2005	Load-Balanced Routing in Interconnection Networks
Professor Kelly Shaw	University of Richmond	kshaw@richmond.edu	2005	Resource Management in Single-Chip Multiprocessors
Dr. Sarah Harris	Harvey Mudd	sharris@odin.ac.hmc.edu	2005	Synergistic Caching in Single-Chip Multiprocessors
Dr. Brian Towles	D. E. Shaw	btowles@cva.stanford.edu	2005	Distributed Router Fabrics
Dr. Ujval Kapasi	Stream Processors	ujk@cva.stanford.edu	2004	Conditional Techniques for Stream Processing Kernels
Dr. Brucek Khailany	Stream Processors	khailany@cva.stanford.edu	2003	The VLSI Implementation and Evaluation of Area- and Energy-Efficient Streaming Media Processors

Former Members

Chris Buehler
Professor Nick Carter
Sandeep Chatterjee
Andrew Chen
Professor Andrew Chien
Andrew Clayton
Todd Dampier
Dr. Larry Dennison
Pamela Elliott
Erich Eminhizer
Dr. Marco Fillo (Postdoctoral Associate)
Dr. Stuart Fiske
Hiroaki Fujii (Visiting Scholar)
J.P. Grossman
Parag Gupta
Yevgeny Gurevich
Mohammed Haque
Professor David Money Harris
Dan Hartman
Professor Soha Hassoun
Dr. Waldemar Horwat
Kinhong Kan
Professor Steve Keckler
Dr. John Keen
Oren Kerem
Keith Klayman
Dr. Kathy Knobe
Dr. Steve Lacy
Dr. Edward Ming-Ju Lee
Dr. Whay Sing Lee
Dr. Richard Lethin
Professor Abelardo Lopez-Lagunas (Postdoctoral Associate)
Albert Ma
Eric McDonald
Masayuki Mizuno (Visiting Scholar)
Dr Daniel Maskit
Dr. Peter Mattson
Ben Mowry
Jinyung Namkoong
Michael Noakes
Dr. Peter Nuth
Professor John Owens
Vishal Parikh
Professor Li-Shiuan Peh
Eileen Peters
Cezar Petriuc
Manman Ren
Professor Scott Rixner
Shelley Russell
Ben Serebrin
Dr. Kentaro Shimada (Visiting Scholar)
Professor Ellen Spertus
Brian Totty
Clifford Tse
Dr. Deborah Wallach
Professor Scott Wills
Diana Wong
Duke Xanthopoulos

Technical Staff

Visiting Scientists

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