Publications 2006 2004 2003 2002 2001 2000 1998 2006 Compiling for Stream Processing Abhishek Das, William J. Dally, Peter Mattson Proceedings of the 15th international conference on Parallel architectures and compilation techniques, Seattle, Washington, 2006 2004 Evaluating the Imagine Stream Architecture Jung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das Proceedings of the 31st Annual International Symposium on Computer Architecture, Munich, Germany, June 2004 Stream Processors: Programmability with Efficiency William J. Dally, Ujval J. Kapasi, Brucek Khailany, Jung Ho Ahn, Abhishek Das ACM Queue, Vol. 2, No. 1, March 2004, pages 52-62. Conditional Techniques for Stream Processing Kernels Ujval J. Kapasi Ph.D. Thesis, Dept. of Electrical Engineering, Stanford University. 2003 Programmable Stream Processors Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter Mattson, John D. Owens. IEEE Computer, pages 54-62, August 2003. The VLSI Implementation and Evaluation of Area- and Energy-Efficient Streaming Media Processors Brucek Khailany Ph.D. Thesis, Dept. of Electrical Engineering, Stanford University. Exploring the VLSI Scalability of Stream Processors Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, John D. Owens, and Brian Towles Proceedings of the Ninth Symposium on High Performance Computer Architecture, February 8-12, 2003, Anaheim, California, USA. 2002 Comparing Reyes and OpenGL on a Stream Architecture John D. Owens, Brucek Khailany, Brian Towles, and William J. Dally Proceedings of the 2002 SIGGRAPH/Eurographics Workshop on Graphics Hardware, September 1-2, 2002, Saarbrücken, Germany, pp. 47-56. Computer Graphics on a Stream Architecture John D. Owens Ph.D. Thesis, Dept. of Electrical Engineering, Stanford University. The Imagine Stream Processor Ujval J. Kapasi, William J. Dally, Scott Rixner, John D. Owens, and Brucek Khailany Proceedings of the IEEE International Conference on Computer Design, September 16-18, 2002, Freiburg, Germany, pp. 282-288. Media Processing Applications on the Imagine Stream Processor John D. Owens, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Brian Towles, Ben Serebrin, and William J. Dally Proceedings of the IEEE International Conference on Computer Design, September 16-18, 2002, Freiburg, Germany, pp. 295-302. A Stream Processor Development Platform Ben Serebrin, William J. Dally, John D. Owens, Chen H. Chen, Stephen P. Crago, Ujval J. Kapasi, Brucek Khailany, Peter Mattson, Jinyung Namkoong, and Scott Rixner Proceedings of the IEEE International Conference on Computer Design, September 16-18, 2002, Freiburg, Germany, pp. 303-308. Stream Scheduling Ujval J. Kapasi, Peter Mattson, William J. Dally, John D. Owens, and Brian Towles Concurrent VLSI Architecture Technical Report 122, March 2002. VLSI Design and Verification of the Imagine Processor Brucek Khailany, William J. Dally, Andrew Chang, Ujval J. Kapasi, Jinyung Namkoong, and Brian Towles Proceedings of the IEEE International Conference on Computer Design, September 16-18, 2002, Freiburg, Germany, pp. 289-296. 2001 Imagine: Media Processing with Streams Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Jinyung Namkoong, John D. Owens, Brian Towles, and Andrew Chang IEEE Micro, March/April 2001, pp. 35-46. A Programming System for the Imagine Media Processor Peter Mattson Ph.D. Thesis, Dept. of Electrical Engineering, Stanford University. Stream Scheduling Ujval J. Kapasi, Peter Mattson, William J. Dally, John D. Owens, and Brian Towles Proceedings of the 3rd Workshop on Media and Streaming Processors, Dec. 2, 2001, Austin, TX, pp. 101-106. 2000 Communication Scheduling Peter Mattson, William J. Dally, Scott Rixner, Ujval J. Kapasi, and John D. Owens Proceedings of the Ninth International Conference on Architectural Support for Programming Languages and Operating Systems, Nov. 12-15, 2000, Cambridge, MA, pp. 82-92. Efficient Conditional Operations for Data-parallel Architectures Ujval J. Kapasi, William J. Dally, Scott Rixner, Peter Mattson, John D. Owens, and Brucek Khailany Proceedings of the 33rd Annual International Symposium on Microarchitecture, Dec. 10-13, 2000, Monterey, CA, pp. 159-170. Imagine: Signal and Imagine Processing with Streams Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Jinyung Namkoong, John D. Owens, and Brian Towles Hotchips 12, August 2000, Stanford, CA. Memory Access Scheduling Scott Rixner, William J. Dally, Ujval J. Kapasi, Peter Mattson, and John D. Owens 27th Annual International Symposium on Computer Architecture, Vancouver, Canada, June 2000, pp. 128-138. Polygon Rendering on a Stream Architecture PDF John D. Owens, William J. Dally, Ujval J. Kapasi, Scott Rixner, Peter Mattson, and Ben Mowery Proceedings of the 2000 SIGGRAPH/Eurographics Workshop on Graphics Hardware, August 20-21, 2000, Interlaken, Switzerland, pp. 23-32. Register Organization for Media Processing Scott Rixner, William J. Dally, Brucek Khailany, Peter Mattson, Ujval J. Kapasi, and John D. Owens Proceedings of the 6th International Symposium on High-Performance Computer Architecture, Jan. 10-12, 2000, Toulouse, France, pp. 375-386. Stream Processor Architecture Scott Rixner Ph.D. Thesis, Dept. of Electrical Engineering and Computer Science, MIT. 1998 A Bandwidth-Efficient Architecture for Media Processing Scott Rixner, William J. Dally, Ujval J. Kapasi, Brucek Khailany, Abelardo Lopez-Lagunas, Peter Mattson, and John D. Owens Proceedings of the 31st Annual International Symposium on Microarchitecture, Nov. 30 - Dec. 2, 1998, Dallas, Texas, pp. 3-13. Point Sample Rendering J.P. Grossman and William J. Dally Proceedings of the 9th Eurographics Workshop on Rendering, June 29 - July 1, 1998, Vienna, Austria, pp. 181-192. Point Sample Rendering (Thesis) J.P. Grossman Master's Thesis, Dept. of Electrical Engineering and Computer Science, MIT.   Last updated Friday, December 2, 2005.